/* global React */

// ─── Project: Diffie–Hellman Hardware Accelerator ────────────────────────────
// To edit: change any field below. Add/remove metrics rows as needed.
// cover options: "mod" | "scanlines" | "gf"
// ─────────────────────────────────────────────────────────────────────────────

window.PROJECT_diffie_hellman_hw = {
  order:  1,
  slug:   "diffie-hellman-hw",
  name:   "Diffie–Hellman Hardware Accelerator",
  sub:    "Conversion of Software modular arithmetic routines in SystemC with Moore-type FSM control.",
  year:   "2025",
  stack:  ["SystemC", "C++", "FSM", "SoC Verification"],
  status: "tested · clean",
  cover:  "mod",

  // Image path relative to portfolio root — leave null to show the texture placeholder
  image:  null,
  // e.g.: image: "assets/images/diffie-hellman.jpg"

  // 4 metrics shown across the top of the project page
  metrics: [
    ["width",      "1024-bit · 32-bit digit-serial"],
    ["control",    "Moore FSM · 6 states"],
    ["operation",  "NN_DigitDivHH — partial quotient step"],
    ["vectors",    "10⁶ randomized · bit-exact vs. ref model"],
  ],

  // Links: [label, url]
  links: [
    ["REPO",   "PRIVATE"],
    // ["report", "assets/diffie-hellman-writeup.pdf"],  // add file when ready
  ],
  problem:
  "Diffie–Hellman key exchange bottlenecks on the inner partial-quotient step of multi-precision digit-serial division, a narrow but critical operation that runs every iteration of NN_Div. Implementing it in hardware requires a structural description, cycle-accurate co-verification against a reference model, and a clean path to RTL.",

  approach:
  "Targeted NN_DigitDivHH, the high-half quotient estimation and correction step inside the digit-serial divider. Designed a structural SystemC module sequenced by a Moore FSM. The software performs reference calculations to confirm correctness of the HW implementation.",

  result:
  "Bit-exact match across 10⁶ randomized vectors with mismatches printed live during simulation. The FSM control is shallow enough to meet timing at the target clock; the module slots into NN_Div as a drop-in accelerator and generalizes to any digit-serial modular arithmetic.",
};